PROGRAMMABLE ACCELERATED COMPUTING

One architecture.
Card to chip.

DIRAC is our foundation for a new class of GPU and accelerator infrastructure—programmable, memory-led, and engineered as one system from software to silicon.

NowProving the architecture on FPGA

NextScaling through systems and silicon

01 / THE IDEA

The GPU became the engine of modern computing. We are rethinking that engine.

Every engineering step—from deterministic execution and HBM locality to live Voice and Chat—is part of a larger platform. DIRAC begins as verified IP, becomes a card, grows into a server and rack, and ultimately becomes purpose-built silicon.

02 / TECHNOLOGY

Built as a complete
compute system.

WORKLOADS
AIGraphicsScienceData
SOFTWARE
Models + ApplicationsTools, compilers, runtime and orchestration
DIRAC
Programmable Compute IPDeterministic execution, data movement and memory locality
SYSTEM
Card → Server → Rack → ChipOne architecture expressed at every scale
01

Programmable at the core

A GPU-class architecture designed to support evolving workloads—not a fixed-function endpoint.

02

Memory-led by design

Compute, HBM and data movement are designed together so the whole system can do useful work.

03

Exact before expansive

We qualify deterministic dense execution first, creating a trustworthy base for broader capabilities.

03 / DIFFERENCE

Architecture is not a component.
It is the whole path.

01

Hardware and software, together

The runtime, workload mapping, compute engines, memory paths and physical implementation evolve as one design.

Full-stack co-design
02

Proof over promises

Exact outputs, deterministic semantics and physical qualification come before performance claims.

Verification-led
03

A platform, not a point product

The same architectural foundation connects today's FPGA work to tomorrow's systems and silicon.

Designed to scale

04 / WHAT DIRAC ENABLES

Wherever accelerated computing matters, DIRAC can fit.

Voice and Chat are our first live applications. The platform ambition spans the same broad workload universe served by modern GPUs—expanded deliberately as the architecture and software stack mature.

AI

Training + inference

Foundation models, fine-tuning, recommendation, search, vision and generative AI.

Initial focus
VISUAL

Graphics + gaming

Rendering, real-time graphics, virtual production, visualization and digital twins.

Roadmap
SCIENCE

Scientific computing

Simulation, numerical methods, engineering analysis, research and discovery.

Roadmap
MEDIA

Media + interaction

Voice, conversational systems, video, imaging and content processing.

Voice live first
EDGE

Robotics + autonomy

Perception, planning and responsive compute from the edge to the data centre.

Future platform
DATA

Analytics + infrastructure

Parallel analytics, databases, security, cloud services and high-throughput computing.

Future platform

05 / PRODUCT PATH

A product family,
not a single box.

01IN QUALIFICATION

DIRAC Card

The development and qualification platform for bringing DIRAC workloads to physical hardware.

02IN DEVELOPMENT

DIRAC Server

An integrated compute system for deploying applications such as Voice and Chat.

03ROADMAP

DIRAC Rack

Scale-out infrastructure that brings the architecture to data-centre deployment.

04FUTURE
DIRAC

DIRAC Silicon

Purpose-built chips that turn the proven architecture into a native silicon platform.

06 / THE GREATER PUZZLE

Build the proof.
Build the system.
Build the future.

Today's engineering is the first layer of a much larger strategy: a sovereign, programmable accelerated-computing platform created in the UAE and built for global scale.

  1. NOWDeterministic dense executionExact single-token qualification on U50
  2. NEXTApplications and systemsVoice, Chat, resident decoding and server integration
  3. SCALEMemory and rack architectureEfficient traffic, deployment and scale-out
  4. FUTUREPurpose-built siliconThe DIRAC architecture in chip form

07 / EXPERIENCE + BUILD

See the first application.
Follow the architecture.